Technology, journalism, social media and social responsibility
I’ve been attending the Design Automation Conference ever since I was a cub technology reporter at Electronic News. Back then, things were very dynamic. People were arguing over deep technical questions such as whether to support VHDL or Verilog, or another standard; what post-layout schemes to adopt; how to devise a heirarchical design methodology. Today the questions are much deeper, and so is the technology.
We have the ability, now, to design chips that are as complex as not just a city but an entire region’s electrical grid, in a space the size of your small fingernail and quite a bit thinner. Designers are implementing chips with tens or even hundreds of processor cores. A cell phone that had a dozen chips five years ago has two, perhaps just one.
Designing and verifying these systems can be extremely complex. Today, it’s not possible to draw a line in the sand between analog chip design and digital chip design. Everything is mixed signal, so the software has to be able to understand both worlds and figure out how to help the designer deal with them…now! That’s because systems manufacturers need the chips now.
But how can you be sure such a complex design is correct before taking it to manufacturing? One leading foundry manager said recently that there are more than 120 design recommendations that deal with boundary effects alone…that is, recommendations for making sure that microscopic electrical lines stay far enough apart, in every dimension, to avoid a short circuit or similar problem. A typical verification strategy today involves working through billions of possibilities. As one verification marketing manager put it recently, there are more possible variations in a complex semiconductor device today than there are atoms in the known universe.
Crunching through all that data in less than 30 centuries requires extremely fast verification software, working in parallel over multiple computers. And because nearly every step of the design process has a complimentary verification step, all of the design software has to be parallelized to be anywhere near fast enough to be useful.
There’s also the growing question of power efficiency. Is my chip running at the lowest possible rate of power consumption, while still doing everything I need it to do? Can I make it last longer if it runs cooler? Can I avoid expensive cooling devices or exotic chip packaging technologies by making my chip operate cooler? Low power design has become extremely important not just because it’s green, but because it can save money as well.
Similarly, we’ve begun to expand outward. By growing our expertise in low power design, the industry is now growing its ability to communicate with systems designers. Whereas in the past the applications developers simply needed to know what kind of performance and memory they could expect from their device, today they need to know what power shutoff tools are available so they can automatically power down an LCD screen or a GPS locator while you are talking on the phone, for example. The link between applications developers and chip developers is now at the firmware level, and this holds great promise for the industry.
The global recession has impacted every industry. This is abundantly clear as I see former colleagues from several companies and even competitors, walking the floor of DAC with resumes and business cards in hand. It would be a depressing sight, except that I earnestly believe this industry holds an important key to economic revitalization. This is an exceptional, international group of people dedicated to improving their products and technologies for the common good. This is a highly educated group of people, mentally tuned to that challenge. This is a group that thrives on innovation, on entrepreneurship, and on risk-taking in pursuit of practical ideas with great potential benefit.
This is the group that will continue to develop the foundation technologies of the future. And it is still very dynamic.