MoSys Fires Up the Bandwidth Engine

I met with Dave DeMaria, vice president of business operations for MoSys at the 47th Design Automation Conference (#47dac), to talk about the company’s transformation over the past few tumultuous years.

As an avid Harley-Davidson rider, I thought I’d seen everything but, what a wild ride they’ve had!

Many will recall that MoSys (formerly Monolithic System Technology, Inc.) started out as a high flyer in the semiconductor industry with a revolutionary 1T-SRAM memory cell architecture design that promised to outperform traditional 6T SRAM in high-speed high-density applications.  The product generated significant interest industrywide, but absent a compelling event to move designers off of their traditional memory choices, it was a difficult sell against established technologies that were cheap and in plentiful supply.

Nevertheless, semiconductor foundry TSMC and others had faith in the process and the company did well for most of the 1990s. Then in 1999 MoSys suddenly changed strategies.  Noting that IP is cheaper and easier to sell than chips, MoSys switched to selling its 1TSRAM as an IP product. The strategy seemed to work at first, propelling MoSys into a public offering in 2001 and a near-acquisition by Synopsys in 2004.  However, Synopsys eventually backed away from the deal, leading to protracted legal skirmishes and sending MoSys down a long spiral that would last for most of the remainder of the decade.

Like many other IP companies during this time, MoSys also began experiencing great difficulty monetizing its products. Management changed hands, and then it changed hands again.

After several years of struggle, in 2008 the board of directors of MoSys pulled the company’s founder, Len Perham, out of retirement to rescue the ailing concern.  As CEO and president, he swept the management staff clean and revisited the company’s core competencies. And he brought DeMaria on board. Just as important, he drew upon his own resources – including a strong background in network technology acquired as chairman of NetLogic – to reposition the memory maker.

The new strategy was nothing short of extraordinary.

Noting that networks are becoming increasingly challenged to handle all the traffic on their lines, Perham hit upon the idea of combining the company’s flagship memory technology with a promising new 10Gbps SerDes I/O technology -acquired through the acquisition of Prism Circuits in June of 2009 – to improve the performance of the data packet analysis that takes place at every junction that a packet must travel through.  The new strategy returns the company from an IP provider to the ranks of a fabless semiconductor company.  The new product, MoSys’ first integrated IC, is known as the Bandwidth Engine.

Mr. DeMaria said that while the product represents a vital leap forward, it doesn’t compete with traditional network processors.

“When you think of network processing, what you’re usually looking at is the routing of signals from one transmission medium to another. What we’re doing takes place at a deeper level,” said Mr. DeMaria. “Today, we have voice signals and data signals and video and so on, all travelling through these various system in data packets, and there are something like 12 to 14 different instances where a single data packet must be temporarily stored in memory while the packet information is analyzed. This is where the Bandwidth Engine excels, because it’s four times faster than traditional memory approaches. And by combining one ultra-high speed 10Gbps Serdes with four 1TSRAM blocks to create a Bandwidth Engine IC, we’re able to deliver four times the throughput of existing devices with two-to-four times the density and just 40 percent of the power requirement. All of this enables a system cost reduction of up to 50 percent, which is pretty significant.”

Indeed. The Bandwidth Engine processes up to 2 billion accesses per second, or more than four times faster (2 BA/sec vs. 0.533 BA/sec for RLDRAM) than existing memory technologies.  A proprietary but relatively simple interface protocol known as the GigaChip Interface enables highly efficient serial chip-to-chip communications in high-speed networking systems.  MoSys has actively garnered support for the GigaChip interface protocol from chip companies and network OEMs.

Mr. DeMaria said the company expects to deliver samples by the end of the year and be in production in 2011. The current plan calls for rolling out devices with FPGA makers first, followed by ASIC suppliers, although there are indications that at least one ASIC company is interested in a fast-track approach.

All of which makes perfect sense when you consider what is happening at the applications level. The new Apple iPhone 4, for example, contains a NetFlix app, meaning users can download and watch entire movies on the iPhone. This could seriously stress not just the networks, but even carriers as large as AT&T.

“There are two big developments out there,” agreed DeMaria. “One, the sheer amount of data, predominantly video. If you can imagine, a single 700MB CD holds thousands of songs, but you need 8GB of memory to hold one movie. There’s just so much more data in video. Secondly, there are so many different kinds of data. Email, voice over internet, video, machine-to-machine. Each data type needs to be analyzed, meaning the data packet has to be stored 12 to 14 times for data analysis. And depending on the application, there’s a certain quality of service level that is required as well, so all of these data packets represent a lot more intelligence than they used to have.

“Today, an iPhone represents a small but growing part of the overall picture. But just imagine, if everyone were watching videos on an iPhone right now, the network would just fall apart.”

Sounds like a compelling event to me.